A gate driver on array (GOA) circuit is to manufacture a scan driving circuit on an array substrate of existing thin film transistor liquid crystal display, so as to achieve a driving manner of scanning the scanning lines line by line.
Reference is made to FIG. 1, which is a circuit schematic of a conventional scan driving circuit. Reference is made to FIG. 2, which a circuit schematic of the conventional scan driving unit shown as FIG. 1. The scan driving circuit is implemented by P-type thin film transistor (TFT). By analyzing the circuit shown as FIG. 1, clock signal XCK is low potential voltage in period T0, and a capacitor C3 is charged, to hold low potential voltage for a transistor M4 in period T1. In the period T1, since clock signal CK is low potential voltage and a transistor M5, potential voltage of a previous stage scanning signal, a transistor M6 are conducted, potential voltage higher than a threshold of the TFT is obtained due to three dividing voltages passed through a point A, so as to cut off transistors M2 and M9. However, the point A connected with a plurality of TFTs in series is unstable, and might conduct the transistors M2 or M9 to pull up potential voltage at a point Q, thus lead to output wrong scanning signal.